Remote System Update JTAG AS EPCS64 Cyclone IV

It appears that the SFL is built-in. That is, I don't need to configure anything for it. I have already been writing to the EPCS device via JTAG, and this is how it works. So, I don't think I need to go down that trail.

I think my first attempt (creating a factory.sof and application.sof and placing them in flash) is the way to go (unless someone says otherwise and can support their claim).

I can see that the FPGA resets upon asserting my RSU_Control module. But, for some reason it fails booting the application image. I've tried different configurations (i.e. enabling the watchdog timer, disabling the watchdog timer, using the boot address, using the page number). For now, I just want to see my application image boot. As for the boot address, I see some conflicting remarks. That is, I see in two different places where it calls for the boot address to be written and another section references the page number location (that is 1 - 6). So, I tried both (the actual address and the page number) but neither worked.

I attached my "control" module and simulation (it maybe too small to view, but it matches the actual operation (I have some debug pins I can port the signals out and view with a scope)).

RSU_Control.vhd is placed in my top.vhd and is enabled via a pushbutton (i.e. start the reconfiguration when I push a button). I have this same RSU_Control in my application image but hardwired the enable to be off. RSU_control.vhd calls the Remote System Upgrade megafunction. Also, the reset_timer signal to the megafunction is set high in the application image. First, it toggles a reset line, sets the timeout value, enables the watchdog timer, sets the boot address, and then asserts the reconfig line.