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Altera_Forum's avatar
Altera_Forum
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16 years ago

Remote System Update dilemma

Hello,

I have a problem how to apply the Remote System Update feature in my system.

Generally, my requirements are following:

- an FPGA (Cyclone III) should be configured depending on which slot a card(PCB) with the FPGA is inserted;

- there are two possible FPGA configurations - either MY_BUS master or slave;

- the configurations scheme is Active Serial, a EPCS will be used;

- it is good to have a possibility to divide EPCS flash contents into 2 parts to contain 2 configuration files. Contents of the flash would be static - there is no need to update EPCS data each time under request.

- an external micro (for example MSPx) reads the card address and depending on it decides which configuration file from the flash to choose to configure the FPGA.

And the questions are following:

1. Should I use the Remote System Update feature to meet the specified requirements?

Generally, I don't need to take a new configuration data from a remote source - I need only uP to select which configuration data form the EPCS to take. But I'm not sure whether it is possible to divide EPCS into 2 parts and have possibility to select one of them without using the ALTREMOTE_UPDATE megafunction.

2. Maybe it is simpler to use 2 different EPCS devices – each have 1 configuration data and then disable/enable an appropriate EPCS device?

3. If I have to use the Remote System Update (RSU) is it possible just to take sources of the Remote System Update Ref Design. Do I need to perform a significant reconfiguration of these sources for my case? And my configuration scheme is Active serial in comparison to the AP scheme described in the Ref Design. Does it have a big impact on the RSU logic or just PFL should be substituted by the PSL?

I believe that it is not a rare requirement that an FPGA have to reconfigure itself depending on some external circumstances and you have your own experience and can suggest what to do in my case.

Anyway, any advice is appreciated.

Thank you very much,

U.

14 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi,

    You can use single EPCS device with 2 configuration data in to it.

    EPCS will able to store 2 FPGA configuration data but what about software image storage?

    Regards,

    Hardik Sheth
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hardik,

    do u mean software for Nios II? I do not plan to use Nios II processor.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Uilka b

    Yes, Nios software.

    You can use ALTREMOTE_UPDATE in your design for your configuration.

    In your case you have to use active serial mode instead of active parallel mode.

    My suggestion,

    - Use two configuration for FPGA. One is default ( Master/Slave interface as you said ) and check after configuration. Switch to another configuration if required other wise keep FPGA configuration as it is.

    Regards,

    Hardik Sheth
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    So it sounds like you've settled on active serial configuration. You know you could do passive serial and let the uController do the FPGA programming. Anyway, since you've chosen active serial.

    - Get an EPCS or serial flash device large enough to hold at least two firmware images.

    - By default, the first image will always be loaded. You'll then have to check with the uController to see if you've got the right one. If not, use the remote update core to boot the other image.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Jake,

    I can pass to the passive serial configuration if it would simplify the development. But I think I cannot use EPCSs in this configuration. and have no idea how to connect flash, uController and FPGA device correctly on the PCB and what type of the Flash memory to use?

    Can the scheme be as displayed on the page 10-38 of the Configuration Handbook (i'm attaching this picture to the thread)?

    When my micro just selects the location in the Flash memory and write appropriate configuration files to the appropriate location? Next by setting nConfig it says FPGA to go to the configuration stage and sends appropriate data?

    If I am right if there are some guidelines what file to generate in Quartus to be able to load it to the MSP430 and what type of the Flash memory to use?

    Thank you.

    U.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    If you are going to use passive serial mode, you can use any type of flash memory you want to. The idea here would be that the uController programs the FPGA. So the uController will read the data from the flash and program it into the FPGA. You could use a serial or parallel flash. Your choice. The full details of how to configure the FPGA in passive serial mode are found in the user's guide for the Cyclone III. Specifically:

    http://www.altera.com/literature/hb/cyc3/cyc3_ciii51016.pdf

    Configuration involves controlling the nConfig, DCLK, and at least DATA0 lines. In addition, you monitor at least the nStatus line.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    If FPGA device is Cyclone III then it is better to use remote updated feature so that no need to use any uController. Only you have to make sure that EPCS have capacity to store two FPGA images.

    Regards,

    Hardik
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hardik brings up a good point. I assumed the uController had to be there for other reasons. Is this true or not?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi Guys,

    thank you very much for your replies.

    Yes, uController is used to write some registers in the FPGA via SPI. I know it is better to use Nios II and get rid form a micro, but the problem that this is the first FPGA project in our company, and we cannot migrate right away.

    Hardik, If do not use the UController at all - then how to say the FPGA that the reconfiguration should be started? Reconfiguration should be started not only when the PCB is inserted to the rack, on the power up, but also if a master card is damaged and one of the slaves cards should become the master card.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    In this case, using active serial programming, the FPGA triggers its own reconfiguration using the remote update core. Of course you would need some way to let the FPGA know that it needed to reconfigure itself.

    Jake