Remote JTAG access with custom hardware server

Hello Paveetira,

Thank you for the suggestion.

I have read the JTAG over protocol. what I understood : it is used to avoid using the existing JTAG pins for the debug.

Yes it communicates with TCP/IP sever with open source etherlink (GitHub - altera-opensource/remote-debug-for-intel-fpga: This is a software reference code to implement the FPGA remote debug feature. User will compile the reference code into a user space application which exchanged date with Quartus tool via TCP/IP.) .

The etherlink output is PCIe MMIO transactions, which further communicated to L-Tile Avalon MM Intel FPGA IPf or PCIe then to JTAG over IP.

What is am looking is pure JTAG signals as output, could you please share your views on this ???