Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHi,
thank you for answering. Suppose I declare a puls of a certain width in the VHDL code of my FPGA. Now I want to declare a timing diagram in MS Excel to change the width of this puls for experimental reasons. This diagram I want to upload into the FPGA while it is runninig via some conversion to a fileformat that is known by the FPGA without recompiling the code in Quartus. This converted timing file should be uploaded via a serial line to the FPGA. Maybe RAM of the FPGA is needed. I know this can be done with Xilinx FPGA's. Hope you understand me. Regards, Marc