Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHello again with one open key-issue:
For the MFM Decoder/Encoder, I need a 8.2MHz clock. The half frequency 4.1MHz is available via I/O connecter distributed from the controller. Basically, I have to double phase-synchronize the 4.1MHz clock. The answer is a PLL, but the altpll megafunction is not supported by the selected device family MAXII. Realy bad for me. Is there a alternative suggestion available ?