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Honored Contributor
Honored ContributorQuestion on LE
Dear all, Im wondering if it is possible to have a design that actually has fewer logic gates but took up more LE than another design that has more logic gates? This is happened to my desi...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Using the synthesis attribute "keep" should also provide similar results. That said, I hope the original poster understood what's going on here.. :) --- Quote End --- how is that be done?
