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Altera_Forum's avatar
Altera_Forum
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16 years ago

Question on LE

Dear all, Im wondering if it is possible to have a design that actually has fewer logic gates but took up more LE than another design that has more logic gates? This is happened to my desi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Using the synthesis attribute "keep" should also provide similar results.

That said, I hope the original poster understood what's going on here.. :)