Question for LPDDR5 power sharing guideline

Hi altera, 

In the Agilex 7 M-series Pin connection guideline document, I can find guidline for Agilex™ 7 M-Series Devices with R-Tile and F-Tile, Without HBM2E Using LPDDR5. 

1.7.2. Example 2— Agilex™ 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR5 • Agilex™ 7 Device Family Pin Connection Guidelines M-Series • Altera Documentation and Resources Center

When applying LPDDR5 component to the Agilex 7 M-series, which section should I refer to regarding the power sharing guideline?

Thanks.