Question about Custom User HDL

Dude make a HDL block with inputs and outputs and your logic.

Then integrate it in your SOPC connecting the inputs(data, clock, reset) and outputs(5 highest numbers, maybe a valid signal?) in their respective signals. (take a look at the AVALON INTERFACE/SOPC user guide to see the correct name of the signals).

However the calculus won't be done in one clock cycle, it will take X clock cycles + X clock cycle to perform a read in the NIOS2 (i think the total clock cycle number will be small enough for you.. it will probably take 5~10 clock cycles)