Quartus Prime timing analyzer identifying reset nets as clocks

I think you should look closer at why they are being interpreted as clocks. Can you post some code? If you have put resets in the sensitivity list with the intention to create asynchronous resets (my guess), you have to code them appropriately so they don't get interpreted incorrectly.

Hi,

Can you please attach your project .qar file here for us to evaluate?

Thanks.

Best Regards.

Is there an easy command to report all the clock loads (e.g. clock pins) on a net?

Hi,

You may check out the documentation below.

Intel® Quartus® Prime Pro Edition User Guide: Scripting

https://www.intel.com/content/www/us/en/docs/programmable/683432/22-1/tcl_pkg_sta_ver_1-0_cmd_report_clock_network.html

Intel® Quartus® Prime Pro Edition User Guide: Timing Analyzer

https://www.intel.com/content/www/us/en/docs/programmable/683243/22-1/report-clocks-and-clock-network.html

Thanks.

Best Regards,

Ven Ting

Hi,

Do you have any updates on this?

Thanks.

Best Regards,

Ven Ting

Hi,

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

Thanks.

Best Regards,

Ven Ting

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.