Forum Discussion
MSEL is matter depending on the configuration scheme you are using? Tell me, which bitstream you are programming? Is it SOF, POF or JIC?
I am using a SOF file to program the board.
This is the output of my jtagconfig command on the board:
/remote/sbg_toolkits/Altera/quartus_19_4_pro_linux/quartus/bin/jtagconfig
1) USB-BlasterII [1-2.3]
020A40DD 5M(1270ZF324|2210Z)/EPM2210
C32250DD 1SG280HH1(.|S3|AS)/1SG280HH2/..
Is the 020A40DD Jtag ID correct for the Stratix10 GX board?
- RRomano0015 years ago
Contributor
Hello,
- MSEL has nothing to do with issue.
- MSEL Select, if multi image design is the case, which one has to boot from.
From your post Device id on board is detected and is different from one on programming file you choose for programming.
I see you are using Linux, this is better choice but has some caveat need be addressed for. Are required library ok? Try launch by shell and look to what happen on terminal.
Chekup also AN807 about board setup, some dip switch on page 7(not MSEL) appear as selected for JTAG CPLD update.
Last question again NO : Stratix 10 is on board and detected by JTAG as from previous answer->
JTAG ID code 0x020A40DD belong to ARRIA II GX EP2AGX125EF29C5 (WRONG)
Expected code was 0x032250DD belonging to on Board Stratix 10 GX (Right one(expected for on board device))
https://bsdl.info/details.htm?sid=c1b9a05b8b8b08b888ca59b002289d77
The error you report appear as programming file not prepared for stratix board.
- RRomano0015 years ago
Contributor
Hi Please partially disregard some detail on previous reply:
About last question, I seen late two device appear on jtag chain, is the right one selected?
Stratix is the device 2 not the device 1.
So you assigned stratix file to CPLD EPM2210 or to Stratix? can you post a screenshot of programmer in actual config
and then after pressing auto detect button?
- app_engineer5 years ago
New Contributor
Hello,
When I bring up the programmer this is what I see:And if I select HH1 device here is the chain:
- RRomano0015 years ago
Contributor
Hello, exactly as from jtagd stratix device is chained as device 2, right one on my previous post must sound as correct one.
On graphic programmer view sound as "right side <-(one)" you are trying program the left device with file built for stratix.
I don't own this board but looking inside manual instruct use command line programmer directing file to device 1 (Left on graphic version). This seem wrong and generate the error you experienced.
Double click on right IC image and add file or click on file relative to Stratix, leave CPLD 2210 unselected.
If you are using command line, board manual use device 1 in chain but on your board this is CPLD not stratix.
Try change chain device from 1 to 2 and retry.
And last but not least, never seen as reply, which file are you using for?