Forum Discussion
Altera_Forum
Honored Contributor
15 years agoyou will have to hand edit the altmemddr_0_phy_alt_mem_phy.v:
$ diff altmemddr_0_phy_alt_mem_phy-original.v altmemddr_0_phy_alt_mem_phy-fixed.v
2912c2912,2913
< .sreset (seq_clk_disable || ctrl_clk_disable),
---
> .sreset (1'b0),
> // .sreset (seq_clk_disable || ctrl_clk_disable),