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Altera_Forum's avatar
Altera_Forum
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16 years ago

Quartus 8.0 to SP1

Hi,

I recently updates my Quartus version to 8.0 SP1. I had a working project on 8.0 that was using NIOS II processor. When I convert this project to SP1 it compiles fine and I am able to program the chip (stratix III). However, when I try to run my program, it now says that a memory verification error occured between adress 0x1002000 and 0x1002FFFF. I am working on a DE3 board (with DDR2 Ram) and my instruction memory as well as my data memory are both set to this Ram.

Did someone already had an issue on this or does someone has a solution to propose!?

Thanks

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    My first thought is it's probably a timing violation causing the issue, I would look over the new timing reports and make sure they are clean. If they are, I would build a NIOSII project with the ram controller and enough TCM memory to run the the Memory Test example program from the TCM. This way you can start debugging the issue. If the memory test is still failing. (Which may or may not occur, depending on the timing of the build) I would try to start implementing signal tap on the memory interface and see if you can catch the failure. Again if its just a timing issue, any one of these builds may "Work" but if it's a SP issue, the failure would probably be consistent though-out.