My first thought is it's probably a timing violation causing the issue, I would look over the new timing reports and make sure they are clean. If they are, I would build a NIOSII project with the ram controller and enough TCM memory to run the the Memory Test example program from the TCM. This way you can start debugging the issue. If the memory test is still failing. (Which may or may not occur, depending on the timing of the build) I would try to start implementing signal tap on the memory interface and see if you can catch the failure. Again if its just a timing issue, any one of these builds may "Work" but if it's a SP issue, the failure would probably be consistent though-out.