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If you are not sure about correct configuration, you can check IO health with a JTAG boundary scan tool, e.g. TopJTAG — Boundary-Scan (JTAG) Software for Circuit Debugging and Flash Programming
hi, FvM,
I manually create a BSDL file for EPM240T100C5("Device family does not support board-level Boundary-Scan Description Language file generation" for MAX II in quartus. and BSDL is not found in Altera web. )
Following your suggestion, I download TopJTAG. with EXTEST instruction, I can force pin into 0 by “set to 0”. Please find the attached for the TopJtag testing result. The output of bit[2:0] are really set to be low level from PCB side(bit[2],bit[1],bit[0] corresponds to pin84,pin88 and pin90 respectively)
Hopefully, it will help narrow down the cause why it can’t enter user mode. Any log or testing necessary, please let me know, thanks.