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10 years ago

Problems with NANO/ATLAS SOCKIT

in this example controlling LEDS throught AXI from C code,

the project in QUARTUS II in top level ghrd.v shows this "connection" (from qsys export) as:

soc_system u0 (

.pio_led_external_connection_export(LED),

and LED bus deffinition on MODULE at ghrd.v, (assigned to LED pins in PIN PLANNER)

output [7:0] LED,

then if i create this BUS:

output [7:0] DATA1,

and change the line in SOC_SYSTEM:

soc_system u0 (

.pio_led_external_connection_export(DATA1),

Compiler shows like PIN LED[x] is stuck at GND, dowsnt work (BDF schematic file does not affect in the project).

If i put DBF as TOP LEVEL in hierarchy and create a symbol for ghrd.v, then connecting to pins out (like an "Interface" of the original example) like:

http://i.imgur.com/3uiczoc.jpg

y get errors

Error: The auto-constraining script was not able to detect any instance for core < hps_sdram_p0 >

and doesn't work.

How can i use a DBF schematic in a project with SYSTEM_SOC module as shows my_first_hps-fpga example?
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