What is the clock rate of the design? Do the designs all meet timing?
Will the design function at a lower clock rate? Try reducing the clock rate on the bad boards and see if the problem clears. If it does, then its probably timing related.
Have the boards worked in the past, and they are now failing, or have they never worked?
What is the design? Does it depend on external interface logic? I have FLEX10KE boards that could be used for a comparison test.
http://www.ovro.caltech.edu/~dwh/correlator/cobra_pics/cobra_corl.jpg (
http://www.ovro.caltech.edu/%7edwh/correlator/cobra_pics/cobra_corl.jpg)
Cheers,
Dave