Forum Discussion
Altera_Forum
Honored Contributor
12 years agoYour design does look relatively complicated, which isn't going to help. You've clearly tried to design in a number of options.
I can't see anything schematically wrong with it, assuming your 'disconnected' traces are just that. So, I have to assume something in the circuit is causing one or more of the signals to/from the FPGA a problem. Have you an oscilloscope to help you diagnose this? If so, you need to put it to use and look for activity on all the configuration signals and confirm any activity you find has good signal integrity. If you don't have a scope then you are going to have to start removing bits that aren't required for PS boot and see what's affecting the circuit. U2 and the PIC are good candidates to start with. Regards, Alex