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Altera_Forum
Honored Contributor
Honored ContributorProblem with Modelsim List
Hello, I am trying to use a simulate.do file to simulate a project in VHDL, add signals to a list and print this list to an external file. But, even though I am running the simulation until 1ms...
Altera_ForumHonored Contributor
Honored ContributorI've just tried with VCD files and the problem continues...
All that modelsim stores are the values of all signals in the first timestamp (#0) and then stops! Does someone have an ideia? I really need to work around this problem.... Thanks a lot!
