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Altera_Forum
Honored Contributor
16 years agoProblem with Modelsim List
Hello, I am trying to use a simulate.do file to simulate a project in VHDL, add signals to a list and print this list to an external file. But, even though I am running the simulation until 1ms...
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- Hello, But, even though I am running the simulation until 1ms, in my list all signals go only until 660ns... --- Quote End --- What version of ModelSim are you using here? Try checking simulation options in Simulate Menu->Runtime Options. Here one can set limits on wlf file limit, simulation time limit and iteration limit. Do you have those things correctly in place?