New Contributor
New ContributorHI,
Actually if I try to boot the FPGA in AS x 1 mode this one automatically reboots and I cannot take control over the JTAG link.
if I look at the data and NCS signals from the flash memory the ncs signal drops to 0 then goes up after a certain time and then remakes the same sequence continuously. the DATA signal is at 1 when NCS is at 1 (pull up resistance) and at 0 when nCS is at 0.
the only way to take control of the JTAG chain on a long-term basis is to cause an error by keeping the data signal from memory high. but when I try to access the Flash memory the signals are not generated
my hardware connection is that of page 228 of a10_handbook.pdf except for the nCE pin which is connected to gnd through a resistance of 1K
similarly the pin NIO_pullup is connected to gndthrough a resistance of 1K and all other programming pins are connected in accordance with document PCG-01017.pdf
thank you for all
regards
