Honored Contributor
Honored ContributorHi, how about your project? did you find a solution? I also want to use the Avalon MM Master Template the access the on-chip memory core in the Avalon bus from my self-defined component? Before the on-chip memory core connecting to the self-defined component it connected to a Avalon MM Master in a PCIe core and mapped the address to 0x02000000, and then connected the on-chip memory to the Master of the self-defined component and mapp to address 0x02000000 too, but what I read from the 0x02000000 in the self-defined component are all ZERO. Do you know what is the problem?
