Altera_Forum
Honored Contributor
17 years agoProblem In Reading SSRAM On Cycone III
Hi,
I am using Cyclne III Kit ... Which has External SSRAM on it. I am trying to perform read and write from it. I have coded small state machine which generates control signals to SSRAM. The writes are working good in both RTL and Gate Level Simulation. But I observed Read is not happening in Gate Level Simulation. I have seen data floating on DQ at Rising edge of the clock. But my registred read data is 32'hXXXXXXXXX. Please anybody help to figure out the mistake ? Thanks, Ganapathi.