Problem in NiosII based design with different instructions and data memories

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I think that in order to load the software correctly, the memory for instructions needs to be also connected to the data master port.

You must also check when generating the bsp that all your linker sections point to the correct memory (i.e. .text to the instruction memory, .bss, .ro and .rw (IIRC) to the data memory).

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Thank you. It works. However, this means to modify, manually, the linker every time I make modification in my design.