Altera_Forum
Honored Contributor
15 years agoPower and ground pin decoupling capacitors
Hello everybody,
In the Max II CPLD manual required Power and ground pin decoupling capacitors requirements are stated as follows: Board Decoupling Guidelines: Decoupling requirements are based on the amount of logic used in the device and the output switching requirements. As the number of I/O pins and the capacitive load on the pins increase, more decoupling capacitance is required. As many as possible 0.1-mf power-supply decoupling capacitors should be connected to the VCC and GND pins or the VCC and GND planes. This seems very big, around here we generally use 100 nF on uC pins. Opinions ? Thanks, Eric