Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Power and ground pin decoupling capacitors

Hello everybody, In the Max II CPLD manual required Power and ground pin decoupling capacitors requirements are stated as follows: Board Decoupling Guidelines: Decoupling require...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hello,

I dont know if this the right place to this quetion, but some one know how obtain the capacitance of instances in a netlist file from Quartus II tool.

I need to use the netlist file from Quartus tool, in the Nanosim tool from Synopsys, because there isn't any Altera tool to obtain the capacitance of a instance (resistor, transistor, capacitor, etc) of a FPGA design.

Thank you for help.