Honored Contributor
Honored Contributordwh@ovro.caltech.edu thank you for sharing. don't get me wrong but my moral abilities never allowed me to mess with somebody else's code. when i create it i feel full freedom of actions,but when i'm about to go through specific path and understand somebody's code it feels like i'm trapped in a narrow corridor and i hate that feeling. only in very inescapable situations i force myself to understand somebody else's code :)
but as for the others.. people became wolfs for each other.nobody wants to teach anyone anything. "it is my knowledge why should i tell you"... this forces newer generations (like me) to become vicious about giving away knowledge; -making me yet another man who wants to suck everything from everyone and not to give away anything. and this is not my fault. today's society created me the way i am. i understand that this is a technical forum not moral one but i believe what i'm saying right now is very important both for the reader and for this forum also.i'm sure so many saw this threat who knew the answer but nobody bothered to say that single word. after hitting a wall by head through many days i came to the solution: it appears to be that fitter uses these pll post scaler counters (C4,C3,C2,C1,C0) in non orderly manner. for example you may implement clock 4 output, but pll will use C0 counter for convenience and routability simplification reasons.and it will not inform you which C it used for that specific clock output. so to tie them togather, like to tie Clock 4 output with C4 counter; or in other words to force pll to use C4 counter for Clock 4 output, you must use "Preserve PLL Counter Order logic option" assignments attribute as described in http://quartushelp.altera.com/13.0/mergedprojects/logicops/logicops/def_preserve_pll_counter_order.htm . locate your pll module in assignments menu and set this attribute for it. it will tie all the C -s with their respective pll Clock outputs
