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Altera_Forum's avatar
Altera_Forum
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15 years ago

pll reconfiguration on cycloneIII

Dear all, My requirement is to have a pll that can be reconfigured on fly to 2 different frequency 100 MHz and 50 MHz. My input clock is 5MHz. I am using 2 ROM having the settings for the 2 fre...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

first of all thanks for your feedback.

Actually the PLL before the dynamic reconfiguration is locked as expected but after it starts locking but finally the output stays high.

my design is using 2 ROM with 2 mif files, one mux, one PLLreconfig block and one PLL.

I checked all the intermediate signal and everything looks OK

I will try the proposal from others which is using an altclkctrl block.

But if you have an idea about what's wrong with my design I would appreciate. I just want to understand what is not correct.

Thanks

Hakim