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Altera_Forum
Honored Contributor
16 years agoPipelining a recursive equation
Dear Forum, I am working on a polyphase filter implementation, which is built up from a number of recursive equations such as: A(n) = alpha*[X(n-1)-A(n-1)] + beta*[X(n)-A(n-2)] + X(n-2) ...
Altera_Forum
Honored Contributor
16 years agoHI pancake
Unfortunately for this implementation the sample rate is the system clock rate, i.e., 100MHz on an SIII. Would creating a clock sub-domain running at 300MHz, say, for the filters be a way forward? Bye for now, Kurt