Forum Discussion
Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- I'm not afraid of actually soldering, it's just they're super tiny components. And I don't want to solder them only to have to remove them because the FPGA board is used for something else. --- Quote End --- I doubt they are that small ... I was soldering 0201 (1mm x 0.5mm) parts last week ... those things are too small, so I'll make sure to stick with 0402 next time I design a board :) Removal is pretty easy, you just wipe a hot soldering iron over both ends of the part and they come off really easily. Like I said, so long as you're not trying to do performance measurements, you're probably fine leaving the terminations off. --- Quote Start --- The Pin Planner tool keeps locking me out from making changes after I select LVDS. Either it will prevent me from changing something (ignore my change) or prevent me from deleting something. --- Quote End --- Go to the "Assignments Editor" and make the edits there. You can also go to "Project->Generate Tcl File for Project", edit that file (remove the redundant (n) assignments), then use "Assignments->Remove Assignments" and remove all assignments, and then source the edited Tcl file. I generate all my projects by sourcing Tcl files, rather than the GUI. It makes it much easier to create designs. Take a look at the attached example. It includes differential LVDS constraints. Look at the constraints file in scripts/constraints.tcl, and look at the "Project->Generate Tcl File for Project" script in qwork/s4gxdk.tcl to see how those constraints resolve to Altera's constraints. Cheers, Dave