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Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- First, thank you for your help --- Quote End --- You're welcome. FPGAs can be pretty confusing to start with :) --- Quote Start --- I'm using TI's ADC 5282 EVM (evaluation module) --- Quote End --- Ok. According to the main page ... http://www.ti.com/tool/ads5282evm the output signals are LVDS. --- Quote Start --- I'm using the DE2-115 fpga board --- Quote End --- Ok. To receive LVDS on this board you have to do two things; 1. Set the VCCIO jumper to 2.5V to allow LVDS constraint on the HSMC pins. See the DE2-115 schematic, p23, the LVDS signals input to Bank 5 and 6, and see p27 for the power jumper settings, jumper JP7 pin 5+6 to select VCCIO = 2.5V for banks 5+6. 2. Manually solder the 100-ohm terminations onto the board. See the DE2-115 schematic, p23 where the termination resistors are marked DNI = do not install. Meaning that you have to install them :) Have you done both of these steps? Then you also need to create a spreadsheet with the HSMC pin assignments on your evaluation board and what it connects to on the DE2-115 to make sure all signals are compatible. Cheers, Dave