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Altera_Forum
Honored Contributor
15 years agophysical interface between Cyclone III & DAC
Hello to all,
I am working on a test waveform generator project using the Cyclone III starter kit (3C25N). Once synthesized on the FPGA, the waveform will be sent to a DAC so that it can be viewed using an oscilloscope. I'm using the TI DAC5672 eval module which has a 34-pin header for input. Is there any way I can physically interface the DAC with the FPGA? I've worked with an FPGA before but never on interfacing a DAC with it. Extensive google searches did not turn up anything useful. Thanks in advance for the help.20 Replies
- Altera_Forum
Honored Contributor
You can review the documentation of the Terasic THDB_ADA board, that can connect to the C3 starter kit.
- Altera_Forum
Honored Contributor
Thanks a lot for the info!
In general, does Altera provide ways to interface with CMOS I/O devices such as the DAC evaluation module I mentioned. I contacted TI support regarding this and their recommendation was to contact Altera support. - Altera_Forum
Honored Contributor
The DAC can be directly connected to FPGA 3.0V or 3.3V single ended IO pins, as e.g. the said THDB_ADA board does. The C3 starter kit exposes IOs only through the HSMC connector, so you need to make an adapter that connects your eval module to this interface.
P.S.: All C3 starter kit IOs are in fact 2.5V supplied, so you have to check, if the eval module can be driven by this level, otherwise you need level converters. Interestingly, the THDB_ADA board also interfaces the 2.5V FPGA IOs directly, although the respective requires even a 2.1V Vih level (DAC5672 2.0 V). A good circuit layout would be required to achieve a reliable signalling under this circumstances. - Altera_Forum
Honored Contributor
--- Quote Start --- Hello to all, I am working on a test waveform generator project using the Cyclone III starter kit (3C25N). Once synthesized on the FPGA, the waveform will be sent to a DAC so that it can be viewed using an oscilloscope. I'm using the TI DAC5672 eval module which has a 34-pin header for input. Is there any way I can physically interface the DAC with the FPGA? I've worked with an FPGA before but never on interfacing a DAC with it. Extensive google searches did not turn up anything useful. Thanks in advance for the help. --- Quote End --- Page 18 of the evaluation board manual; http://focus.ti.com/docs/toolsw/folders/print/dac5672evm.html Shows the output connector uses 100-mil headers. The Cyclone III starter kit http://www.altera.com/products/devkits/altera/kit-cyc3-starter.html uses an Altera HSMC connector. You need to buy an HSMC break-out board that converts the signals to 100-mil headers. http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=78&no=495 These headers are normally shipped with the evaluation boards (at least they were with the Stratix IV boards). Do you have these connectors? This might work too; http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=67&no=218 Then you have to analyze the timing between your FPGA and DAC and setup appropriate TimeQuest timing constraints. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- You need to buy an HSMC break-out board that converts the signals to 100-mil headers. --- Quote End --- The breakout board that I know (the one documented with the Cyclone III c120 development kit) has a serious disadvantage: It hasn't any ground pins at the debug header. I don't think it's particularly suited to connect single-ended high speed signals. - Altera_Forum
Honored Contributor
Awesome! Looks like the HSMC-GPIO board will do the job.
Would you recommend connecting the male-male headers using jumpers? Or maybe a 34-pin ribbon cable...in that case 6 pins in the GPIO board will be left unconnected. Thanks again! - Altera_Forum
Honored Contributor
--- Quote Start --- Would you recommend connecting the male-male headers using jumpers? Or maybe a 34-pin ribbon cable...in that case 6 pins in the GPIO board will be left unconnected. --- Quote End --- I'd go with whatever you have on-hand. I think the GPIO adapter probably uses a connector the same size as an IDE connector. You could get an IDE cable, cut one end off and then crimp on new pins and plug them into a remap header (crossing signals where needed) to connect to the TI board. But that would require you have the appropriate crimp tool. The main thing to remember is that if you are running these signals at a ~100MHz, you might get reflections and see data glitches or issues. If you have an oscilloscope, you can probe at the pins of the DAC to see what the signals look like. Make sure to connect as many grounds on the cable as you can. Give it a try and see what happens. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- You can review the documentation of the Terasic THDB_ADA board, that can connect to the C3 starter kit. --- Quote End --- After reviewing the documentation, I noticed the following line: "DA and AD converters do no support DC signalling" Does that mean that I can't output an analog signal with a DC offset? - Altera_Forum
Honored Contributor
--- Quote Start --- Does that mean that I can't output an analog signal with a DC offset? --- Quote End --- Look at the DAC5672 eval module schematic on p25 http://focus.ti.com/lit/ug/slau139b/slau139b.pdf Its a transformer coupled output via a T1-1T, which is a minicircuits part http://www.minicircuits.com/pdfs/t1-1t-kk81.pdf So you have an output bandwidth limitation of 0.08-200MHz. However, its your evaluation board once you've paid for it, so hack it at will. However, you will need to buffer the output if you remove the transformer. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- Look at the DAC5672 eval module schematic on p25 --- Quote End --- Thanks for the reply! Actually I was referring to the Terasic Board which has an on-board DAC. I've attached the manual for it (refer to Page 8). The Analog Devices DAC9797 used in the board can be both AC & DC coupled. But I'm not sure why the Terasic board says no DC signalling.