Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

PCIe Simulation Begginer

Hi guys!!

Well, I'm begginer and I'm trying to simulate a PCIe comunication and I'm using Qsys to make it.

I've been read Altera's documents where learning to simulate a PCIe, but Altera's documents doesnt teach enought.

I'm trying simulate a only port PCIe. So I need know where I have to input a data and where I recive that data (and how I can do it) .

When I make PCIe instance (I'm using Avalon MM Cyclone V) it has some I/O such as: hip_pipe , hip_sim and so on.

Reading Altera's documents I've found that hip_pipe is just to simulate so I think that is the port where I have to send and recive datas.

My quistions are:

Is hip_pipe port where I have to send and recive datas (for my simulation)? and How can I do it (because, Qsys make me a testbench, so I dont know where I can recive and send datas)?

Guys, if someone read this post and someday made a PCIe simulation please can explain how made it. I'll be thanking.

Have a nice day!! :)
No RepliesBe the first to reply