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In our system, we employ a NIOSII processor. So ideally we could create a single RBF composed of SOF and ELF data then load that over the PS interface.
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No, the PS interface is only for the FPGA configuration data, eg., SOF file.
If you had an ELF image that was supposed to go into on-chip RAM, then that would be part of the SOF image (via a .mif or .hex file).
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Presently, we do something similar over JTAG with the "nios2-configure-sof" and "nios2-download" command from shell...
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Right, the first configures the FPGA, and the second downloads code to "somewhere". If that "somewhere" is off-chip SRAM, then it does not make sense to make it part of the RBF file.
Does that make sense?
Cheers,
Dave
Honored Contributor
