Honored Contributor
Honored ContributorHi Tricky,
On the CARMA board http://www.ovro.caltech.edu/~dwh/carma_board/ (http://www.ovro.caltech.edu/%7edwh/carma_board/) I had a similar set of requirements; * Stratix II system controller FPGA configured by a MAX II CPLD from flash * PowerPC processor held in reset by the system controller, and then enabled to boot U-Boot from the flash * PowerPC PCI interface that must be initialized (by U-Boot) before the BIOS configures PCI * PowerPC boots Linux. The Linux image can be on the flash too, but that generally network boots over a virtual network link over the PCI bus The MAX II and System controller FPGA have an Altera JTAG chain. A new board can be programmed via JTAG. However, during production, I simply programmed the MAX II and Flash devices prior to assembly. The PowerPC has a JTAG connector, and I have a BDI2000 debugger. That debugger has flash programming capabilities. Given that, there was no point in having flash programming in the MAX II or System Controller FPGA. Once the PowerPC boots, and is visible over the PCI bus, its pretty simple to program the Flash via PCI. So you can load the system controller using an .sof file, boot, and then program the flash. Or boot with an old system controller image, and then erase and re-program the flash. Since the production boards had system controller images and U-Boot images, boards could be plugged into a 19-slot cPCI crate, and the flash images updated en-mass to the latest versions. In your system, your ARM processor can perform all the flash programming. Its likely to be faster than using the Altera JTAG cable. Are you planning on reconfiguring the FPGA once its alive? If so, you may want to run a few tests. Linux and Windows are not very happy when PCI devices disappear. I plan on running some tests to see how well PCIe hot-swapping is supported under Linux. What is the form-factor of your new board? I'm about to start designing an Advanced Mezannine Card (AMC). Cheers, Dave
