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ZChester's avatar
ZChester
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4 months ago

p0_pin_perst_n remains asserted when implementing GTS AXI Streaming intel FPGA IP for PCI Express

Hi, I'm using GTS AXI Streaming intel FPGA IP for PCI Express to implement PCIe on Agilex 5 FPGA (A5ED065BB32AE4 ,Quartus Prime 25.1) . I connect Pin p0_pin_perst_n_i to a 3.3v pll up resistance on ...
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VenT_Altera's avatar
VenT_Altera
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4 months ago

Hi Chester,


Thank you for providing the updates, and my apologies for the late reply.


5. I didn't Insert the PCIe board into the motherboard everytime when testing.

Could you clarify this? My understanding is that the PCIe board (Arrow Eagle board) is always inserted into the motherboard, and you test by programming the SOF and rebooting the PC.


6. The pin p0_pin_perst_n is low and LTSSM stuck on state 0 , is that normal ? I tried to capture the STP using Type: Transitional in the storage qualifier settings but it didn't work .

No, p0_pin_perst_n should toggle from low to high, and then LTSSM should eventually reach h11 (L0 state). You can capture this using STP with Transitional settings. What are the errors you encountered when setting the storage qualifier to Transitional?


Thanks.

Best Regards,

Ven


  • ZChester's avatar
    ZChester
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    4 months ago

    Hi Ven,

    I thought that the pcie ip would reset itself when the board powers on and the pin PERST# is always high (tied to a pull-up resistance) so i don't have to insert the board into the motherboard before . I realized that it is not right so i now insert the board into the motherboard everytime when testing .

    Sorry for misleading you . What i meant is i captured the STP after setting the storage qualifier type to transitional , p0_pin_perst_n still didn't toggle from low to high .

    Best Regards,

    Chester