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Altera_Forum
Honored Contributor
14 years agoI can't draw a schematic right now. I'll try to explain with words.
Transistor gate/base near FPGA output. Then the harness wire connected to the drain/collector. The other side of the harness wire connects to: 1- the 12V pull up resistor 2- the gate/base of the receiving stage, near fpga input The pull up to 3.3V near fpga input. In other words, both resistors near to the receiver, while transistors are one per side.