Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

one problem in simulate IP core.(SDRAM controller)

Hi,everybody.

I creat a new project. And create a sdram controller with the plug-in manager. At last, the manager create a new subfolder named "testbench" . and there is a vhdl file(**_tb.vhd) in it.

I want to simulate the design. But, when I create the waveform file, I cannot find the nodes in **_tb.vhd with node finder. In the dialog box "select hierarchy level", there are only the main project But no component in the new subfolder "testbench". And the **_tb.vhd is the the new subfolder.

What can i do to find the nodes in **_tb.vhd?

thanks.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    you cannot use HDL test benches in Quartus II Simulator. you'll have to use ModelSim-Altera Starter Edition which is free to use an HDL test bench.