object assigned a value but never read - does this effect synthesis?

Thanks for the reply - that's enlightening!

Unfortunately, after adding the synthesis attribute, the register is still not synthesized.

Is there a setting in Quartus that needs to be enabled so that synthesis attributes are not ignored - or am I simply using this incorrectly?

The new code is below:

module connector_test(button, txd);
input button;
output reg txd;
reg  data /* synthesis syn_noprune */;
always @(button) begin
    if(button==1'b0) begin
        txd <= 1'b0;
        data <= 8'hFF;
    end
    else begin
        txd <= 1'b1;
        data <= 8'b0;
    end
    
end
endmodule