NiosII DMA Tutorial

Thank you for your reply :)

Well, actually the PIO will be connected to several FIFOs which are located outside the Nios II system. So I thought that at first I needed to verify whether the DMA can handle data transfer from the PIO to memory (is it correct?)

I forgot to tell you about my current debugging system. It consists of a CPU, a memory (DDR3), two PIO, and a DMA. So here are what I'm doing to verify my PIO-DMA data transfer :

- I set a PIO in output direction (lets call it PIO-A) and another PIO in input direction (lets call it PIO-B ). I connect those two PIOs (PIO-A is connected to PIO-B ) in my verilog code. So in other words it is just like a loopback test.

- In my Nios-II software, I generate dummy data and transmit them via PIO-A.

Then of course, the data will be received back by PIO-B (I have ensured that PIO-B received the correct data from PIO-A).

- The problem happens when I try to move data which are received by PIO-B to memory via DMA. The data transfer result was just like what I wrote in my previous post. The DMA only wrote and copied the last data that was received by PIO-B (why did the DMA copy the last data?? :confused:I thought that if the DMA only recognizes the last data it won't copy as many as the specified data length)

Is there anything wrong with my verification method? I'm wondering that the dummy data

that is generated by Nios-II software and received by PIO-B is too slow for DMA.

If it is the problem, do you have any suggestion how is the correct way to verify my PIO-DDR3 data transfer via DMA?

Thanks!