NIOS 2 SPI as SLAVE

Can you be a little more specific in your definition of what you want regarding master and slave.

The NIOS II is a processor, and it is a master on the Avalon-MM bus.

The NIOS II can have an SPI peripheral in its memory map. That peripheral will be an Avalon-MM slave. The peripheral could be an SPI master or slave, depending on the implementation.

There is also an SPI-to-Avalon-MM bridge that you can use to have an SPI slave that allows you to control an Avalon bus as a master.

Confusing, eh!

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I want to implement a nios 2 softcore with an spi slave

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I suspect that what you want is an Avalon component that implements an SPI slave. That component would also be an Avalon-MM slave. Take a look in the Embedded IP Peripherals users guide.

http://www.altera.com/literature/ug/ug_embedded_ip.pdf

p85: "The SPI core can implement either the master or slave protocol".

Cheers,

Dave

You are correct with your assumption.

The FPGA will be part of a device that performs specific tasks and will be remotely controlled via SPI form a different device.

So we implemented a SPI interface with the new Qsys and configured it to behave as a SPI Slave device.

I have taken a look in the guide before but I am afraid I need more guidance.

My specific Problem is this:

The FPGA will receive a Command String from another device telling it what to do.

I need to understand how I can activate the SPI interrupt in C, so that everytime a transmission is started the interrupt handler can do what I need it to do. I believe I need to register the interrupt or something and define the handler.

SO far I tried this:

Initialising:

void init_spi{
/* Enable SPI read-ready interrupt */
  alt_irq_register(SPI_0_IRQ, (void*) &spi_context, handler_spi_isr);
}

handler:

static void slave_spi_isr(void* context, alt_u32 id)
{
  printf("Works, yay!\n");
}

I put that in the Hello_World example and it compiles okay.

But an spi command send to the fpga does not trigger the

handler. What's weird though, when I did the same inside the

NIOS 2 Debugging enviroment, there was an error message

telling me "target faild to interrupt".

I am sorry, if my questions or my confusion seems stupid,

but I am more used to 8-bit architectures, where I can look

up the internal register structure of a given processors

hardware and where I know every Register by heart.

Sorry, I don't know the answer to that particular question as I do not use the NIOS software tools.

Bring up Qsys and see what the IRQ number for the SPI core is, check that you're using the right IRQ line.

If I was faced with this issue, I would create a Modelsim testbench and generate an SPI transaction, and then trace the IRQ line from the component to the NIOS IRQ lines to confirm that the SPI slave core was doing what it is supposed to.

Alternatively, you can do the same in hardware using the SignalTap II logic analyzer. Probe the SPI core IRQ line and see if it asserts properly.

I have not looked at the SPI core registers, but there might be an interrupt enable line both at the peripheral and at the processor that you need to enable. Check the documentation.

You're definitely on the right track though.

Cheers,

Dave

--- Quote Start ---

You are correct with your assumption.

The FPGA will be part of a device that performs specific tasks and will be remotely controlled via SPI form a different device.

So we implemented a SPI interface with the new Qsys and configured it to behave as a SPI Slave device.

I have taken a look in the guide before but I am afraid I need more guidance.

My specific Problem is this:

The FPGA will receive a Command String from another device telling it what to do.

I need to understand how I can activate the SPI interrupt in C, so that everytime a transmission is started the interrupt handler can do what I need it to do. I believe I need to register the interrupt or something and define the handler.

SO far I tried this:

Initialising:

void init_spi{
/* Enable SPI read-ready interrupt */
  alt_irq_register(SPI_0_IRQ, (void*) &spi_context, handler_spi_isr);
}

handler:

static void slave_spi_isr(void* context, alt_u32 id)
{
  printf("Works, yay!\n");
}

I put that in the Hello_World example and it compiles okay.

But an spi command send to the fpga does not trigger the

handler. What's weird though, when I did the same inside the

NIOS 2 Debugging enviroment, there was an error message

telling me "target faild to interrupt".

I am sorry, if my questions or my confusion seems stupid,

but I am more used to 8-bit architectures, where I can look

up the internal register structure of a given processors

hardware and where I know every Register by heart.

--- Quote End ---

Hi Trixter,

I am trying to do the same (The FPGA will receive a Command String from another device telling it what to do) as you have tried sometime back.

My applications needs SPI slave to raise the interrupt after receiving certain number of bytes (for example say 4 bytes). I did not find much information in Altera Forum on SPI slave.

I would like to ask if you have found solution for your problem. Could you please share any information or link or document which could help me to implement the SPI slave.

Thanks in advance.

Regards

pavan