Next gen processor FS90, right direction?

Hi @sf90p,

Thank you for posting in Intel community forum and hope all is well.

This does not seems to be Intel FPGA product, but more towards processors.

Hence allow me to route you to the correct channels and relevant support will get back to you.

Hope that clarify.

Best Wishes

BB

Hello sf90p,

Thank you for posting on the Intel® communities. I do appreciate your feedback related to this new processor technology and architecture.

I will close this thread since support is not needed, however, we will keep your feedback in mind. Feel free to open a new thread if you need support or if you would like to share your ideas.

Please keep in mind that this thread will no longer be monitored by Intel.

Regards,

Deivid A.

Intel Customer Support Technician

OK, let's look at an engineering pont over view, cm, mm vs inches and fractions of.

Computers work in base 2, so does 1/2 inch, 1/4, 1/8 1/16, 1/32, 1/64, 1/128 & 1/256.

Whilst mm goes in dividing by 10 or base 10, also 0.5 or 1/2cm, or 500/1000, 1000/10000, 2000/10000, it all goes strange when using computer maths.

My point is fractional math is faster, less steps involved in calculating the answer hence is faster.

Serial based math computing is easy!

I think we need to move away from base 10 in as far as human & computer interaction is concerned and work with whichever is faster as computers are very fast nowdays and translating from and to human form is only necessary in print commands when a person needs to read or input its value.

Let's work in base 2 systems.

I'm wearing a "Base 2" t-shirt!

Let's store as w.f.o whole.fraction.of or fraction.of like 123/32

You are correct, a base 10 number system stored in base 2. I'm calling for a base 10 sizeing with base 2, stored in a base 2.

It's closer to the metal. It's about fractional math not decimal math on the metal.

What percentage of most applications are spent doing fractional math?

I suspect it is in the single digits, i.e. less than 10%. Probably closer to 1%.

Optimizing 1% of your code to execute 10X (or even 100X) faster is not going to be noticeable.

What you have proposed might make an interesting technical paper or senior project, but is not a practical commercial application.

Absolutely silly. And completely unrelated to FPGAs, mostly. Not even talking about implementing such code in an FPGA. Just someone's pet project.

"Yes though 10-100 times faster is a noticeable thing." ... No it is not, if you only do it 1% of the time.