I'm not going to say which language is better..... for the record I started with VHDL but like verilog more now :)
Anyway my recommendation would be to create a new verilog and VHDL file in Quartus II, then select "Edit" --> "Insert Template" and compare the templates between the two languages.
In general verilog is typically more compact but like others have said it's not as strong typed so if you code something incorrectly you may not find out right away like you do with VHDL. If you have developed software before in C I think you'll have an easier time starting with verilog since the syntax is very similar (in fact when I'm jumping back and forth between hardware and software I often code in the wrong language forgetting what I'm doing :))