Forum Discussion
Altera_Forum
Honored Contributor
15 years agoLooking at your code, it is quite clear you are trying to treat VHDL as if it were software. It is not. Think about the logic you need before trying to describe it in code.
A couple of points show this : your attempted use of recursion, and trying to complete everything in a single clock cycle. In Digital logic you need to pipeline functions like this. As a general rule, you can only complete a single arithmetic function (like add, multiply) per clock cycle, but you can run many functions of these in parrallel. You are trying to complete many multiplies and adds in series within a single clock cycle. Id step back and reasses your logic design. Try and draw it on paper or in visio before writing the VHDL.