Skip to contentBrand Logo
Forums
BlogKnowledge BaseAltera.com
RegisterSign In
  1. Altera Community
  2. Forums
  3. FPGA Device

Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Need a solution

hey ,

I'm working on an Altera DE2-70 project and i'm wondering if i could implement the CUPS in Altera
No RepliesBe the first to reply

Recent Discussions

  • mfbm's avatar
    QSPI DDR Interface with Cyclone10LP: Maximum frequency
    24 minutes ago
    mfbm
  • DoverHsu's avatar
    MAX10 fiftyfivenm encrypted module
    1 hour ago
    DoverHsu
  • Steve9's avatar
    Agilex 7 F Series Transceiver Pins Allowed Voltages During Powerup/When Unpowered
    1 hour ago
    Steve9
  • JohnHaraguchi's avatar
    Stratix 10 CKEXT Drive Level 32 GHz Clock
    1 hour ago
    JohnHaraguchi
  • Sumanth's avatar
    Timing Behavior of Remote Update IP After Reset on Cyclone 10 GX (10CX150YF672E5G)
    4 hours ago
    Sumanth
Contact Us
Altera YoutubeAltera YoutubeAltera Twitter
  • Company Overview
  • Newsroom
  • Our Leaders
  • Careers
Subscribe to Altera Newsletter

© Altera Corporation | Terms of Use | Privacy Policy | Cookies | Trademarks | PSIRT

Altera Logo