Altera_ForumHonored Contributor13 years agoMy code doesnt complete synthesis Hello i am trying to implement this code in a cyclone IV. I can't understand why it never finishes the synthesis process, i do understand that it's a lot of routing to be done but it can't even finis...Show More
Recent DiscussionsAgilex 7 (F-tile/R-tile) PCIe Gen5 RX Compliance Test Issue -some lanes can't enter LoopbackLooking for the Document ID 854068SolvedAbout floating voltage of the Agilex 3 power on resetSuggestion of carry chain type TDC of Cyclone 10 GX FPGA chipsIP components used in the design have conflicting settings. Intel PCIE Ftile MCDMA