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Altera_Forum's avatar
Altera_Forum
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17 years ago

multi-Voltage I/O?

We need to connect 1V8 peripheral to FPGA,so i am not sure and clearly about the following problem : if we wire ref-volt of the bank which I/O belongs to (VCCIO) into 2.5V, Can we make something i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

To my opinion, the device manuals are clear in this point. As they are rather verbose, you may have missed the respective statements. In my own words:

- The output voltage of an I/O bank is exclusively determined by VCCIO.

- VREF pins are used with special I/O standards as SSTL (with DDR-RAM). They only affect the behaviour of the inputs

- assigning a different I/O voltage in Quartus only affects the current strength calculation and is used to check the pin assignment

- interoperation of 1.8V and 2.5V devices may be possibly achieved with VCCIO of 1.8V, if VIH,min of the 2.5V devices can be kept. Otherwise you need a separate I/O bank or level translation.

A poor mans level translation may be done by resistive dividers for unidirectional outputs