Honored Contributor
Honored ContributorSpecifically the levels must be well defined when the FPGA gets out of POR, which is probably not the case if you drive them with a microprocessor that is on the same supply rails. If the microprocessor is on another power supply, is powered on before the FPGA, and provides the correct MSEL levels before the FPGA gets out of POR, then it should be fine. Alternatively it could hold the FPGA in reset state by holding the nCONFIG pin low until the MSEL pins have the correct levels.
I think what Altera says there is that you are on your own if you want to drive those pins programmatically. Is there any reason why you'd like to drive those pins?
