Forum Discussion
New ContributorMixed I/O pin standards and VCCIO
I am using a Cyclone 10 GX device. Can I use a 1.2 V LVCMOS output pin in an I/O bank with VCCIO of 1.8 V? In the same I/O bank, can I also use LVDS input pins and differential SSTL-12 output pins with on-chip calibration? I read the I/O handbooks, but I cannot find the answer.
Hello,
Yes there is. You can use Chip/Pin Planner under Assignment tab on your Quartus.
This is the tutorial video that you can refer to: https://www.youtube.com/watch?v=Bt-yDRReKZw
We have a few tutorial videos that you can refer to on our Youtube channel: Intel FPGA
Hope this helps.
Amin.
8 Replies
AminT_IntelRegular Contributor
Hello,
You can only use 1.2 V Vccio for input and output of 1.2 V LVCMOS.
The Intel Cyclone 10 GX devices support OCT in all FPGA I/O banks. For the 3 V I/Os,
the I/Os support only OCT without calibration. OCT with calibration is available for LVDS I/O and so as Differential SSTL-12.You may look for further details on your device GPIO document: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10gx-51003.pdf
Thank you,
Amin
TwincreeksThank Amin for your reply.
Can you clarify the following general rule? Per "Intel Cyclone® 10 GX Core Fabric and General Purpose I/Os Handbook" (C10GX51003 | 2020.09.25) Page 91, Table 34,
1) for a 1.2 V LVCMOS output pin, must VCCIO be 1.2 V?
2) for a differential SSTL-12 output pin, must VCCIO be 1.2 V?
3) for an LVDS output pin, , must VCCIO be 1.8 V?
- AminT_Intel
Hello,
1) for a 1.2 V LVCMOS output pin, must VCCIO be 1.2 V?
Yes.
2) for a differential SSTL-12 output pin, must VCCIO be 1.2 V?
Yes for the Vccio output pin.
3) for an LVDS output pin, , must VCCIO be 1.8 V?
LVDS I/O bank supports differential and single-ended I/O standards up to 1.8 V.
Thank you.
- Twincreeks
Thank you for your confirmation.
- Twincreeks
Is there any way to assign in the Quartus software what the VCCIO of a specific I/O bank is, in addition to the I/O standard of a specific pin?
- AminT_Intel
Hello,
Yes there is. You can use Chip/Pin Planner under Assignment tab on your Quartus.
This is the tutorial video that you can refer to: https://www.youtube.com/watch?v=Bt-yDRReKZw
We have a few tutorial videos that you can refer to on our Youtube channel: Intel FPGA
Hope this helps.
Amin.
