Forum Discussion

Twincreeks's avatar
Twincreeks
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Mixed I/O pin standards and VCCIO

I am using a Cyclone 10 GX device. Can I use a 1.2 V LVCMOS output pin in an I/O bank with VCCIO of 1.8 V? In the same I/O bank, can I also use LVDS input pins and differential SSTL-12 output pins wi...
  • AminT_Intel's avatar
    AminT_Intel
    5 years ago

    Hello,

    Yes there is. You can use Chip/Pin Planner under Assignment tab on your Quartus.

    This is the tutorial video that you can refer to: https://www.youtube.com/watch?v=Bt-yDRReKZw

    We have a few tutorial videos that you can refer to on our Youtube channel: Intel FPGA

    Hope this helps.

    Amin.